Signal rise time is not the time it takes for the signal to go from low to high but is part of it. The definition of the industry is not yet unified. The best way is to follow the definition of the upstream chip makers. After all, these giants have the right to speak. There are usually two types: The first type is defined as 10-90 rise time, which is the time taken for the signal to rise from 10% of high level to 90%. The other is the 20-80 rise time, which is the time it takes for the signal to rise from 20% of the high level to 80%. Both are used, as can be seen from the IBIS model. For the same waveform, the natural 20-80 rise time is shorter.
Well, as long as you understand this is enough. For our terminal applications, accurate figures are sometimes not very important, and this digital chip manufacturer will not usually list them directly to us. Of course, some chips can roughly estimate this value from the IBIS model. Unfortunately, not every You can find IBIS models on all kinds of chips.
The important thing is that we must establish the concept that the rise time has a significant impact on the performance of the circuit. If it is as small as a certain range, it must be noticed, even if it is a very vague range. There is no need to precisely define this range of standards, and there is no practical significance. You just need to remember that the current chip processing technology makes this time very short, has reached the ps level, and you should pay attention to his influence.
As the rise time of the signal decreases, problems such as reflection, crosstalk, track collapse, electromagnetic radiation, and ground bombs become more serious, and the noise problem is more difficult to solve. In previous generations, design solutions may not be applicable in this generation of products.
The decrease in signal rise time, from the spectrum analysis point of view, is equivalent to an increase in signal bandwidth, that is, there are more high-frequency components in the signal. It is these high-frequency components that make the design difficult. Interconnects must be treated as transmission lines, creating many problems that were not previously available.
Therefore, to learn about signal integrity, you must have the concept that the steep rising edge of a signal is the culprit for signal integrity problems.
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