Two parallel converters multiply the maximum load current circuit diagram

Probe current voltage pin 420*4450 head diameter 5.0 over current current and voltage pin

Photocoupler

Automotive equipment, industrial equipment, and FireWire peripherals all require high-efficiency, space-saving power supplies that can deliver high currents at high voltages. The problem is that high-voltage, high-current, single-chip buck converters do not control the required load current.

One solution is to connect two converters in parallel to double the maximum load current. However, a standard configuration of the buck converter needs to be improved to maintain load sharing (sharing) and stability between the two converters, reducing the input/output voltage ripple.

Figure 1 shows a DC-DC converter with an input voltage of 8 to 40V and a maximum load current of 4A with an output voltage of 5V. It uses two LT3430 60V 3A (peak switching current) single-core buck converters in parallel. The circuit uses a multiphase oscillator with spread-spectrum modulation (SSFM) to allow the two converters to maintain synchronization (180° phase shift) at frequencies up to 250 kHz. Figure 2 shows the efficiency of the circuit of Figure 1.

Since the fixed switching frequency of 200 kHz has a slight difference between the two converters, synchronization is important. If two converters are allowed to operate at different switching frequencies, the output ripple may carry some unwanted low frequency ripple over time, with a frequency exactly equal to the difference between the two converter frequencies.

By maintaining a 180° phase difference between the two converters, the input/output ripple can be reduced. In general, when one IC current increases, the current of the other IC is decreasing, so that their ripple currents cancel each other, thereby reducing the pressure on the input and output storage capacitors. Conversely, if two ICs are operating in phase, the two ICs need to draw current from or simultaneously with the capacitor in each cycle, which doubles the circuit ripple compared to a single IC.

The SSFM mode of the sync signal from the LTC6902 is set between 235kHz and 250kHz, which reduces EMI peaks. This effect can be seen with the switching frequency fixed at 250 kHz. By changing the position of the jumper (grounding the component leads of the LTC6902), the SSFM mode can be cleared and the frequency set to 250kHz.

Assuming a reasonable circuit layout and a duty cycle between 40% and 60%, the dual converter circuit requires half the capacitance of a single IC circuit at 4A load current. In applications that require a wide range of duty cycles, the double IC circuit has a ripple that is a little more than half that of a single IC circuit.

In the case of a wide load range, the best setting for both heat dissipation and efficiency is to evenly share the load between the two ICs. This can be achieved by connecting the outputs of the two error amplifiers (VC pin) together to eliminate the voltage difference and feedback gain between the two error amplifiers. In addition, the two ICs can work together within the inductance and regulator gain tolerances. The current shared by the two devices in the design is approximately equal over the entire load current range. Using two independent 2.5A, 22μH power inductors is better than using a single 5A, 10μH inductor because the total volume of the two inductors is twice as small as the volume of a single large inductor, which minimizes component height.

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