introduction
Today, electronic systems often have many different power rails. This is especially true in systems that use analog circuits and microprocessors, DSPs, ASICs, and FPGAs. For reliable, repeatable operation, the switching timing, rise and fall rates, power-up sequence, and amplitude of each supply voltage must be monitored. The established power system design may include power sequencing, power tracking, supply voltage/current monitoring, and control. There are a variety of power management ICs that perform timing control, tracking, power-up, and shutdown monitoring.
Timing control and tracking devices can monitor and control multiple power rails. Functions may include setting the turn-on time and voltage rise rate, undervoltage and overvoltage fault detection, and margin trimming (adjusting the supply voltage over a range of nominal voltage values) ) and orderly shutdown. There are many types of ICs suitable for these applications, such as pure analog devices using resistors, capacitors, and comparators, complex high-integration state machines, and programmable devices that are digitally controlled via the I2C bus. In some cases, the system's voltage regulators and controllers may include critical control functions.
For systems with multiple switching controllers and regulators, another consideration is how to minimize system noise when the device is operating at different switching frequencies. Synchronous regulator clocks are often required. In fact, many of today's high performance switch controllers and regulators can be synchronized to an external clock.
Figure 1. Type of control for the power rail
Power sequencing and tracking
The so-called power supply timing control refers to switching the power supply in a specified order. Power sequencing can be based simply on a given chronological order, or the turn-on time of one power supply depends on when another power supply reaches a set threshold. Power tracking is based on the fact that the supply voltage cannot (and generally should not) change instantaneously. Power system designers can take advantage of this feature to effectively control the slope of each power supply in the system relative to other power supplies. Power tracking is divided into three categories: synchronization, ratio, and offset. The four graphs in Figure 1 compare timing control, synchronization tracking, ratio tracking, and offset tracking.
In Figure 1a, the three power supplies are turned on and off in a certain time sequence. The first is that the 3.3 V power is turned on, and the subsequent power on and off delay times depend on the needs of the application. If the rated maximum requires the power supply to be activated in a certain order, this simple timing control technique will ensure that the active device voltage does not exceed the rated maximum. For example, before the ADC-driven amplifier is powered up, we must ensure that the ADC's power supply is present, otherwise the front end of the ADC may be damaged.
Figure 1b shows a synchronous tracking situation where all three power supplies are turned on at the same time and track each other at the same rate, so the lowest supply voltage is first established and then the higher supply voltage. The power supply is turned off in the opposite way. This example is a good illustration of how power is turned on in legacy FPGA or microprocessor applications: first activate the lower core voltage and then turn on the auxiliary or I/O power. An example of synchronous tracking with Xilinx Virtex-5 FPGAs will be given later.
In Figure 1c, the power supplies are powered up at different slopes. As mentioned earlier, the ability to control the slope dV/dt of the power supply is a very useful feature that prevents large inrush currents (charging currents) in the decoupling capacitors in the circuit from damaging the device. If unrestricted, the inrush current can greatly exceed the nominal operating current. The slope limit prevents active device latch-up, capacitor short-circuit, PCB trace damage, and line fuse blown.
In Figure 1d, all power supplies have the same slope, but their application time is determined by the predetermined offset voltage. This type of tracking is useful for devices that need to limit the supply voltage difference (often occurring in the nominal maximum portion of mixed-signal devices such as DACs and ADCs), which prevents permanent damage to the device.
FPGA-based design example
Powering with FPGA systems is a living resource for exploring multi-power system processing. Proper FPGA power control is critical to achieving a reliable, repeatable design that can cause catastrophic failures in the lab or even on site. Most FPGAs have multiple power rails, generally designated VCCO, VCCAUX, and VCCINT. These power supplies are used to power the FPGA core, auxiliary circuits (such as clocks and PLLs), and interface logic, respectively.
The considerations for these power rails can be divided into the following categories:
Timing control of the power rail
Power rail voltage tolerance requirements
Power supply may have soft start or slope control requirements
The following is an example of the power requirements of the Xilinx Virtex-5 family of FPGAs, which offer many features including logic programmability, signal processing, and clock management. According to the data sheet, the Virtex-5 power-up sequence requires VCCINT, VCCAUX, and VCCO. These power supplies have a ramp time from 200 μs (min) to 50 ms (maximum) relative to ground. The recommended working conditions are shown in Table 1.
As mentioned earlier, Virtex-5 requires synchronous voltage tracking. In addition, the power supply must be within the specified recommended operating tolerances and must rise and fall within a specific dV/dt range.
But the FPGA, however, is only part of a larger system. To further clarify this example, assume a high current, 5 V main system power rail. The 1 V supply that powers the FPGA core has a tolerance of ±5% (±50 mV) and requires up to 4 A. The 3 V supply is a general-purpose logic supply with a tolerance of ±5%. In this example, 4 A is required to power the FPGA I/O and other logic in the design. The 2.5 V supply is an analog supply and requires a low noise 100 mA current.
For this application, the ADP1850 dual channel buck controller provides a high current supply of 1 V and 3 V is a good solution. The ADP1850 has many features including soft-start control, synchronous tracking, and master-slave power sequencing. The rate of rise at power-up is controlled by the capacitance on the SS1 and SS2 pins. In this example, the 3 V digital power supply is the main power supply. For the 2.5 V analog supply, the ultra low noise low dropout regulator (LDO) ADP150 is an excellent choice for timing control using the ADP1850's PGOOD2 signal. Figure 2 shows a simplified block diagram of the system showing the general flow of timing control. See the ADP1850 data sheet for details.
Figure 2. Virtex-5 power system
The above example illustrates the common use of timing control and tracking, which can be extended to many of today's multi-supply systems, including microprocessor-based systems and systems involving mixed-signal technologies (ADCs and DACs).
Analog Voltage and Current Monitoring (ADM1191)
For high-reliability applications that require precise monitoring of multiple system supply currents and voltages, simple analog monitoring circuits can be used. For example, the digital power monitor, the ADM1191 provides 1% measurement accuracy, including a 12-bit ADC for current and voltage readback, a precision current sense amplifier, and an ALERTB output for overcurrent interrupts. Figure 3 shows the application of the ADM1191 in conjunction with a host controller such as a microprocessor or microcontroller.
Figure 3. Simple supply voltage and current monitor
The ADM1191 communicates with the host controller over the I2C bus. By configuring the logic input levels of the A0 and A1 pins, the same system can support up to 16 devices for addressing. The local controller can multiply the measured voltage by the current to calculate the power consumption of the power rail. In the event of an overcurrent condition, the ALERTB signal quickly informs the controller via an interrupt. This quick alarm on the fault condition can help protect the system from damage.
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